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general description the max20002/max20003 are small, synchronous buck converters with integrated high-side and low-side mosfets. each device is designed to deliver up to 2a/3a with input voltages from 3.5v to 36v, while using only 15a quiescent current at no load. voltage quality can be monitored by observing the pgood signal. the devices can operate in dropout by running at 98% duty cycle, making them ideal for automotive applications. the devices offer fixed output voltages of 5v/3.3v, along with the ability to program the output voltage between 1v to 10v. frequency can be programmed using a resistor to ground on the fosc pin from 220khz to 2.2mhz. the devices offer a forced fixed-frequency mode and skip mode with ultra-low quiescent current of 15a. they have a pin that can be programmed to turn on/off the spread spectrum, further helping systems designers with better emc management. the max20002/max20003 are available in a small 5mm x 5mm 20-pin tqfn package with exposed pad and use very few external components. applications point-of-load applications in automotive distributed dc power systems navigation and radio head units benefts and features synchronous dc-dc converter with integrated fets ? max20002 = 2a ? max20003 = 3a ? 15a quiescent current when in standby mode small solution size saves space ? 220khz to 2.2mhz adjustable frequency ? programmable 1v to 10v output for the buck or fixed 5v/3.3v options available ? fixed 8ms internal soft-start ? fixed output voltage with 2% output accuracy (5v/3.3v) or externally resistor adjustable (1v to 10v) with 1% fb accuracy pgood output and high-voltage en input simplify power sequencing protection features and operating range ideal for automotive applications ? operating v in range of 3.5v to 36v ? 42v load-dump protection ? 99% duty-cycle operation with low dropout ? -40c to +125c automotive temperature range ? aec-q100 qualifed ordering information appears at end of data sheet. 19-7311; rev 5; 4/16 evaluation kit available max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
max 20002 max 20003 fosc out fb comp bias bst pgnd pgnd sps pgood agnd en supsw supsw sup fsync n . c . lx lx lx ep 12 k ? 0 . 1 f 2 x 22 f 2 . 2 h 2 . 2 f 4 . 7 f 20 . 0 k ? 1 , 000 p f 2 . 2 f v out = 3 . 3 v / 5 v at 3 a , 2 . 2 mhz v bat typical application circuit/block diagram maxim integrated g 2 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
sup, supsw, lx, en to pgnd ........................... -0.3v to +42v sup to supsw .................................................... -0.3v to +0.3v bias to agnd ......................................................... -0.3v to +6v sps, fosc, comp to agnd ................ -0.3v to (v bias + 0.3v) fsync, pgood, fb to agnd .............. -0.3v to (v bias + 0.3v) out to pgnd ....................................................... -0.3v to +12v bst to lx ................................................................ -0.3v to +6v agnd to pgnd .................................................... -0.3v to +0.3v output short-circuit duration .................................... continuous continuous power dissipation (t a = +70c) 20-pin tqfn (derate 33.3mw/c above +70c) .. 2666.7mw operating temperature range ......................... -40c to +125c junction temperature ..................................................... +150c storage temperature range ............................ -65c to +150c lead temperature (soldering, 10s) ................................. +300c soldering temperature (reflow) ....................................... +260c tqfn junction-to-ambient thermal resistance ( ja ) .......... 30c/w junction-to-case thermal resistance ( jc ) ................. 2c/w (note 1) electrical characteristics v sup = v supsw = 14v, v en = 14v, l1 = 2.2h, c in = 4.7f, c out = 44f, c bias = 2.2f, c bst = 0.1f, r fosc = 12k?, t a = t j = -40 c to +125 c, unless otherwise noted. typical values are at t a = +25 c. parameter symbol conditions min typ max units supply voltage v sup , v supsw 3.5 36 v load-dump event supply voltage v sup_ld t ld < 1s 42 v supply current i sup_ standby standby mode, no load, v out = 3.3v, v fsync = 0v 15 30 a supply current (5v) i sup_ standby standby mode, no load, v out = 5v, v fsync = 0v 20 35 a shutdown supply current i shdn v e n = 0v 5 10 a bias regulator voltage v bias v sup = v supsw = 6v to 42v. i bia s = 0 to 10ma 4.7 5 5.4 v bias undervoltage lockout v uvbias v bias rising 2.9 3.15 3.4 v bias undervoltage-lockout hysteresis 400 500 mv thermal-shutdown threshold 175 c thermal-shutdown threshold hysteresis 15 c maxim integrated 3 note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to ab solute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
electrical characteristics (continued) v sup = v supsw = 14v, ven = 14v, l1 = 2.2h, c in = 4.7f, c out = 44f, c bias = 2.2f, c bst = 0.1f, r fosc = 12k?, t a = t j = -40c to +125c, unless otherwise noted. typical values are at t a = +25c. parameter symbol conditions min typ max units output voltage pwm-mode output voltage (note 2) v out_5v v f b = v bia s , 6v < v sups w < 36v, fxed-frequency mode 4.9 5 5.1 v v out_4.2v 4.12 4.2 4.28 v out_3.3v 3.23 3.3 3.37 skip-mode output voltage (note 3) v out_ skip_5v no load, v fb = v bias , skip mode 4.9 5 5.15 v v out_ skip_4.2v 4.12 4.2 4.33 v out_ skip_3.3v 3.23 3.3 3.4 load regulation v fb = v bias , 30ma < i loa d < 3a 0.5 % line regulation v fb = v bias , 6v < v supsw < 36v 0.02 %/v bst input current i bst_on high-side mosfet on, v bst - v lx = 5v 1.5 ma i bst_off high-side mosfet off, v bst - v lx = 5v 1.5 a lx current limit i lx max20003 3.75 5 6.25 a max20002 2.5 3.33 4.16 lx rise time v out = 5v, 3.3v 4 ns spread spectrum spread spectrum enabled fosc 3% high-side switch on- resistance r on_h i lx = 0.5a, v bia s = 5v 60 140 m high-side switch leakage current high-side mosfet off, v su p = 36v, v lx = 0v, t a = +25c 1 5 a low-side switch on- resistance r on_l i lx = 0.5a, v bia s = 5v 35 70 m low-side switch leakage current low-side mosfet off, v sup = 36v, v lx = 36v, t a = +25c 1 5 a fb input current i fb t a = +25c 20 100 na fb regulation voltage v fb fb connected to an external resistive divider, 6v < v supsw < 36v 0.99 1 1.01 v fb line regulation ?v line 6v < v supsw < 36v 0.02 %/v transconductance (from fb to comp) gm v fb = 1v, v bias = 5v 700 s minimum on-time t on_min 80 ns maximum duty cycle dc max 98 99 % maxim integrated 4 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
electrical characteristics (continued) v sup = v supsw = 14v, v en = 14v, l1 = 2.2h, c in = 4.7f, c out = 44f, c bias = 2.2f, c bst = 0.1f, r fosc = 12k?, t a = t j = -40c to +125c, unless otherwise noted. typical values are at t a = +25c. note 2: device not in dropout condition. note 3: guaranteed by design; not production tested. note 4: contact the factory for sync frequency outside the specified range. parameter symbol conditions min typ max units oscillator frequency r fosc = 73.2k 400 khz r fosc = 12k? 2.0 2.2 2.4 mhz sync, en, and sps logic thresholds external input clock acquisition time t fsyn c 1 cycle external input clock frequency r fosc = 12k? (note 4) 1.8 2.6 mhz external input clock high threshold v fsync_hi v fsyn c rising 1.4 v external input clock low threshold v fsync_lo v fsyn c falling 0.4 v fsync leakage current t a = +25c 1 a soft-start time t ss 5.6 8 12 ms enable input high threshold v en_hi 2.4 v enable input low threshold v en_lo 0.6 v enable threshold-voltage hysteresis v en_hys 0.2 v enable input current i en t a = +25c 0.1 1 a spread-spectrum input high threshold v sps_hi 2.0 v spread-spectrum input low threshold v sps_lo 0.4 v spread-spectrum input current i sps t a = +25c 0.1 1 a power-good and overvoltage-protection thresolds pgood switching level v rising v fb rising, v pgood = high 93 95 97 %v fb v falling v fb falling, v pgood = low 90 92.5 95 pgood debounce time 25 s pgood output low voltage i sink = 5ma 0.4 v pgood leakage current v out in regulation, t a = +25c 1 a overvoltage protection threshold v out rising (monitor fb pin) 107 % v out falling (monitor fb pin) 104 v out rising (monitor fb pin) (max20002c/max20003c only) 105 v out falling (monitor fb pin) (max20002c/max20003c only) 103 maxim integrated 5 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
(v sup = v supsw = 14v, v en = 14v, v out = 5v, v fsync = 0v, r fosc = 12k?, t a = +25c, unless otherwise noted.) 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v out (v) i load (a) load regulation 400khz toc04 2.2mhz 0 10 20 30 40 50 60 70 80 90 100 0.0001 0.001 0.01 0.1 1 10 efficiency (%) load current (a) f sw = 2.2mhz v in = 14v efficiency vs. load current toc01 skip mode fpwm mode 3.3v 3.3v 5v 5v coilcraft xal5030 - 222meb 2.00 2.04 2.08 2.12 2.16 2.20 2.24 2.28 -40 -25 -10 5 20 35 50 65 80 95 110 125 switching frequency (mhz) temperature ( c) f sw vs. temperature toc07 v out = 3.3v v in = 14v, fpwm mode v out = 5v 0 10 20 30 40 50 60 70 80 90 100 0.0001 0.001 0.01 0.1 1 10 efficiency (%) load current (a) f sw = 400khz, v in =14v efficiency vs. load current toc02 skip mode fpwm mode 3.3v 3.3v 5v 5v 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 12 42 72 102 132 switching frequency (mhz) r fosc (k?) switching frequency vs. r fosc toc08 2.10 2.12 2.14 2.16 2.18 2.20 2.22 2.24 2.26 2.28 2.30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 switching frequency (mhz) i load (a) f sw vs. load current toc05 v out = 3.3v v in = 14v, fpwm mode 375 380 385 390 395 400 405 410 415 420 425 0.0 0.5 1.0 1.5 2.0 2.5 3.0 switching frequency (mhz) i load (a) f sw vs. load current toc06 v out = 3.3v v in = 14v, fpwm mode 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v out (v) i load (a) load regulation 400khz toc03 2.2mhz v out = 5v, v in = 14v, skip mode 10 15 20 25 30 35 40 45 50 6 12 18 24 30 36 supply current ( a) supply voltage (v) supply current vs. supply voltage toc09 3.3v/2.2mhz skip mode maxim integrated 6 7slfdo2shudwlqjkdudfwhulvwlfv www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
(v sup = v supsw = 14v, v en = 14v, v out = 5v, v fsync = 0v, r fosc = 12k?, t a = +25c, unless otherwise noted.) 0 1 2 3 4 5 6 7 8 9 10 6 12 18 24 30 36 shutdown current ( a) supply voltage (v) shutdown current vs. supply voltage toc10 3.3v/2.2mhz skip mode 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 -40 -25 -10 5 20 35 50 65 80 95 110 125 v bias (v) temperature ( c) bias voltage vs. temperature toc13 v in = 14v, i load = 0a, fpwm mode 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 6 12 18 24 30 36 42 v out (v) v in (v) v out vs. v in toc15 5v/2.2mhz pwm mode i load = 0a 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 6 12 18 24 30 36 v out (v) v in (v) v out vs. v in toc14 5v/2.2mhz, i load = 0a, fpwm mode 10 15 20 25 30 35 40 45 50 -40 -25 -10 5 20 35 50 65 80 95 110 125 supply current ( a) temperature ( c) supply current vs. temperature toc11 3.3v/2.2mhz skip mode 0 1 2 3 4 5 6 7 8 9 10 -40 -25 -10 5 20 35 50 65 80 95 110 125 shutdown current ( a) temperature ( c) shutdown current vs. temperature toc12 3.3v/2.2mhz skip mode maxim integrated 7 typical operating characteristics (continued) www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
2v/div 0 5a/div toc23 20ms v out i lx v pgood short circuit (pwm mode) 0 0 5v/div 500mv/div (ac - coupled) 0 1a/div toc22 100s v out i out load transient (pwm mode) 10v/div 5v/div 10v/div toc19 10ms v in v out dips and drops v lx v pgood 0 0 0 0 5v/div 5v/div 2v/div 2v/div toc20 400ms v in v out v pgood cold crank 5v/2.2mhz 0 10v/div 0 5v/div toc21 100ms v out v in load dump 0 10v/div 0 toc18 200ns v lx v fsync sync function 0 5v/div 5v/div 100v/div 1v/div toc16 100nf full - load startup behavior 10v/div 5v/div 1a/div 2ms v in i load v out v pgood 0 0 0 0 10v/div 5v/div 1v/div toc17 4s v in v out slow v in ramp behavior i load 0 0 0 0 v pgood 2a/div 5v/div maxim integrated 8 typical operating characteristics (continued) (v sup = v supsw = 14v, v en = 14v, v out = 5v, v fsync = 0v, r fosc = 12k?, t a = +25c, unless otherwise noted.) www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
pin name function 1 fosc resistor-programmable switching frequency setting control input. connect a resistor from fosc to agnd to set the switching frequency. 2 out switching regulator output. out also provides power to the internal circuitry when the output voltage of the converter is set between 3v to 5v during standby mode. 3 fb feedback input. connect an external resistive divider from out to fb and agnd to set the output voltage. connect to bias to set the output voltage to 5v or 3.3v. 4 comp error amplifer output. connect an rc network from comp to agnd for stable operation. see the compensation network section for more details. 5 bias linear regulator output. bias powers up the internal circuitry. bypass with a minimum of 2.2f ceramic capacitor to ground. 6 agnd analog ground 7 en sup voltage-compatible enable input. drive en low to disable the devices. drive en high to enable the devices. 8, 9 supsw internal high-side switch supply input. supsw provides power to the internal switch. bypass supsw to pgnd with a 0.1f and 4.7f ceramic capacitors. 10 sup voltage supply input. sup powers up the internal linear regulator. bypass sup to pgnd with a 2.2f ceramic capacitor. 11 pgood open-drain, pgood output. pgood asserts when v out is above 95% regulation point. pgood goes low when v out is below 92% regulation point. 16 17 18 19 4 3 2 1 20 5 10 9 8 7 6 12 13 14 15 11 max 20002 max 20003 lx lx lx n . c . fsync sup supsw supsw en agnd fosc out fb comp bias bst pgnd pgnd sps pgood tqfn ( 5 mm x 5 mm ) ep * * ep = exposed pad maxim integrated 9 pin confguration pin description www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
pin name function 12 sps spread-spectrum pin. pull high for spread spectrum on and low for spread spectrum off. 13,14 pgnd power ground 15 bst high-side driver supply. connect a 0.1f capacitor between lx and bst for proper operation. 16C18 lx inductor switching node 19 n.c. no connection 20 fsync synchronization input. the devices synchronize to an external signal applied to fsync. connect fsync to agnd to enable skip mode operation. connect to bias or to an external clock to enable fxed-frequency, forced-pwm mode operation. ep exposed pad. connect ep to a large-area contiguous copper ground plane for effective power dissipation. do not use as the only ic ground connection. ep must be connected to pgnd. maxim integrated 10 pin description (continued) www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
figure 1. internal block diagram internal bias regulator control logic pv supsw bst lx pgnd pwm sup en pgood comparator feedback select logic switchover logic pgood high level pgood low level fb out agnd pv pv v ref = 1v internal soft-start eamp comp oscillator spread spectrum on/off fsync select logic zero- crossing comparator connected hi (pwm mode) external clock lx clk slope comp logic current-limit threshold fsync sps fosc pgood max20002 max20003 connected lo (skip mode) bias maxim integrated 11 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
detailed description the max20002/max20003 are 2a/3a current-mode step- down converters with integrated high-side and low- side mosfets. the low-side mosfet enables fixed- frequency, forced-pwm operation in light-load applica - tions. the devices operate with input voltages from 3.5v to 36v while using only 15a quiescent current at no load. the switching frequency is resistor programmable from 220khz to 2.2mhz and can be synchronized to an external clock. the devices output voltage is available as 5v/3.3v fixed or adjustable from 1v to 10v. the wide input voltage range, along with its ability to operate at 99% duty cycle during undervoltage transients, makes the devices ideal for automotive applications. in light-load applications, a logic input (fsync) allows the devices to operate either in skip mode for reduced current consumption, or fixed-frequency, forced-pwm mode to eliminate frequency variation and help minimize emi. protection features include cycle-by-cycle current limit, and thermal shutdown with automatic recovery. wide input voltage range the devices include two separate supply inputs (sup and supsw) specified for a wide 3.5v to 36v input voltage range. v sup provides power to the device and v supsw provides power to the internal switch. when the device is operating with a 3.5v input supply, conditions such as cold crank can cause the voltage at the sup and supsw pins to drop below the programmed output voltage. under such conditions, the devices operate in a high duty-cycle mode to facilitate minimum dropout from input to output. maximum duty-cycle operation the devices have a maximum duty cycle of 98% (typ). the ic monitors the off time (time for which the low-side fet is on) in both pwm and skip modes every switch - ing cycle. once the off time of 100ns (typ) is detected continuously for 12s, the low-side fet is forced on for 150ns (typ) every 12s. the input voltage at which the devices enter dropout changes depending on the input voltage, output voltage, switching frequency, load current, and the efficiency of the design. the input voltage at which the devices enter dropout can be approximated as: out out on_h sup v (i r ) v 0.98 + = note: the equation above does not take into account the efficiency and switching frequency but is a good first-order approximation. use the r on_h number from the max column in the electrical characteristics table. linear regulator output (bias) the devices include a 5v linear regulator (v bias ) that provides power to the internal circuit blocks. connect a 2.2f ceramic capacitor from bias to agnd. power-good output (pgood) the devices feature an open-drain power-good output (pgood). pgood asserts when v out rises above 95% of its regulation voltage. pgood deasserts when v out drops below 92.5% of its regulation voltage. connect 3*22wr%,6zlwkdnuhvlvwru synchronization input (fsync) fsync is a logic-level input useful for operating-mode selection and frequency control. connecting fsync to bias or to an external clock enables fixed-frequency, forced-pwm operation. connecting fsync to agnd enables skip-mode operation. the external clock frequency at fsync can be higher or lower than the internal clock by 20%. if the external clock frequency is greater than 120% of the internal clock, contact the factory applications team to verify the design. the devices synchronize to the external clock in two cycles. when the external clock signal at fsync is absent for more than two clock cycles, the devices use the internal clock. system enable (en) an enable control input (en) activates the devices from their low-power shutdown mode. en is compatible with inputs from automotive battery level down to 3.5v. the high-voltage compatibility allows en to be connected to sup, key/kl30, or the inhibit pin (inh) of a can transceiver. en turns on the internal regulator. once v bias is above the internal lockout threshold, v uvbias = 3.15v (typ), the converter activates and the output voltage ramps up within 8ms. a logic-low at en shuts down the device. during shut - down, the internal linear regulator and gate drivers turn off. shutdown is the lowest power state and reduces the quiescent current to 5a (typ). drive en high to bring the devices out of shutdown. maxim integrated g 12 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
spread-spectrum option the spread spectrum can be enabled on the device using a pin. when the sps pin is pulled high the spread spectrum is enabled and the operating frequency is varied 3% centered on fosc. the modulation signal is a trian - gular wave with a period of 110s at 2.2mhz. therefore, fosc ramps down 3% and back to 2.2mhz in 110s and also ramps up 3% and back to 2.2mhz in 110s. the cycle repeats. for operations at fosc values other than 2.2mhz, the modulation signal scales proportionally (e.g., at 400khz, the 110s modulation period increases to 110s x 2.2mhz/0.4mhz = 550s). the internal spread spectrum is disabled if the devices are synchronized to an external clock. however, the devices do not filter the input clock on the fsync pin and pass any modulation (including spread spectrum) present on the driving external clock. internal oscillator (fosc) the switching frequency (f sw ) is set by a resistor (r fosc ) connected from fosc to agnd. for example, a 400khz switching frequency is set with r fosc = 73.2k. higher frequencies allow designs with lower inductor values and less output capacitance. consequently, peak currents and i 2 r losses are lower at higher switching frequencies, but core losses, gate-charge currents, and switching losses increase. overtemperature protection thermal overload protection limits the total power dissipation in the device. when the junction temperature exceeds 175c (typ), an internal thermal sensor shuts down the internal bias regulator and the step-down converter, allowing the ic to cool. the thermal sensor turns on the ic again after the junction temperature cools by 15c. applications information setting the output voltage connect fb to bias for a fixed +5v/3.3v output voltage. to set the output to other voltages between 1v and 10v, connect a resistive divider from output (out) to fb to agnd ( figure 2 ). select r fb2 (fb to agnd resistor) less than or equal to 500k. calculate r fb1 (out to fb resis - tor) with the following equation: out fb1 fb2 fb v r r -1 v ? where v fb = 1v (see the electrical characteristics table). figure 2. adjustable output-voltage setting r fb 1 r fb 2 v out max 20002 max 20003 fb maxim integrated 13 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
forced-pwm and skip modes in pwm mode of operation, the devices switch at a constant frequency with variable on-time. in skip mode of operation, the converters switching frequency is load dependent. at higher load current, the switching frequency does not change and the operating mode is similar to the pwm mode. skip mode helps improve efficiency in light-load applications by allowing the converters to turn on the high-side switch only when the output voltage falls below a set threshold. as such, the converters do not switch mosfets on and off as often as in the pwm mode. consequently, the gate charge and switching losses are much lower in skip mode. inductor selection three key inductor parameters must be specified for operation with the devices: inductance value (l), inductor saturation current (i sat ), and dc resistance (r dcr ). to select inductor value, the ratio of inductor peak-to-peak ac current to dc average current (lir) must be selected first. a good compromise between size and loss is a 30% peak-to-peak ripple current to average-current ratio (lir = 0.3). the switching frequency, input voltage, output volt - age, and selected lir then determine the inductor value as follows: sup out out sup sw out (v v ) v l v f i lir ? = where v sup , v out , and i out are typical values (so that efficiency is optimum for typical conditions). the switch - ing frequency is set by r fosc (see toc 8 in the typical operating characteristics section). input capacitor the input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuits switching. the input capacitor rms current requirement (i rms ) is defined by the following equation: out sup out rms load(max) sup v x(v - v ) ii v = i rms has a maximum value when the input voltage equals twice the output voltage: sup out v 2v = therefore: load(max) rms sup i i v = choose an input capacitor that exhibits less than +10c self-heating temperature rise at the rms input current for optimal long-term reliability. 7kh lqsxwyrowdjh ulssoh lv frpsulvhg ri 9 q (caused e wkh fdsdflwru glvfkdujh dqg9 esr (caused by the esr of the capacitor). use low-esr ceramic capacitors with high ripple-current capability at the input. assume the contribution from the esr and capacitor discharge equal to 50%. calculate the input capacitance and esr required for a specified input voltage ripple using the following equations: esr in l out v esr i i 2 ? = ? + where: sup out out l sup sw (v - v ) v i v fl ?= and: out in q sw i d(1 - d) c vf = ? out supsw v d v = where: i out is the maximum output current and d is the duty cycle. output capacitor the output filter capacitor must have low enough equiva - lent series resistance (esr) to meet output-ripple and load-transient requirements. the output capacitance must be high enough to absorb the inductor energy while transitioning from full-load to no-load conditions without tripping the overvoltage-fault protection. when using high-capacitance, low-esr capacitors, the filter capaci - tors esr dominates the output-voltage ripple, so the size of the output capacitor depends on the maximum esr required to meet the output-voltage ripple (v ripple(p-p) ) specifications: ripple(p-p) load(max) v esr i lir = the actual capacitance value required relates to the physical size needed to achieve low esr, as well as to the chemistry of the capacitor technology. thus, the capacitor is usually selected by esr and voltage rating rather than by capacitance value. maxim integrated g 14 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
when using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity need - ed to prevent voltage droop and voltage rise from causing problems during load transients. generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem. however, low-capacity filter capacitors typically have high- esr zeros that can affect the overall stability. compensation network the devices use an internal transconductance error amplifier with its inverting input and its output available to the user for external frequency compensation. the output capacitor and compensation network determine the loop stability. the inductor and the output capacitor are chosen based on performance, size, and cost. additionally, the compensation network optimizes the control-loop stability. the converter uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor. the devices use the voltage drop across the high-side mosfet to sense inductor current. current-mode control eliminates the double pole in the feedback loop caused by the inductor and output capacitor, resulting in a smaller phase shift and requiring less elaborate error-amplifier compensation than voltage-mode control. only a simple single series resistor (r c ) and capacitor (c c ) are required to have a stable, high-bandwidth loop in applications where ceramic capacitors are used for output filtering (see figure 3 ). for other types of capacitors, due to the higher capacitance and esr, the frequency of the zero created by the capaci - tance and esr is lower than the desired closed-loop crossover frequency. to stabilize a nonceramic output- capacitor loop, add another compensation capacitor (c f ) from comp to ground to cancel this esr zero. the basic regulator loop is modeled as a power modula - tor, output feedback divider, and an error amplifier. the power modulator has a dc gain set by g m r load , with a pole and zero pair set by r load , the output capacitor (c out ), and its esr. the following equations help to approximate the value for the gain of the power modulator (gain mod(dc) ), neglecting the effect of the ramp stabilization. ramp stabilization is necessary when the duty cycle is above 50% and is internally done for the devices: mod(dc) mc load gain g r = where r load = v out /i out(max) lqdqgj mc = 3s. in a current-mode step-down converter, the output capaci - tor, its esr, and the load resistance introduce a pole at the following frequency: pmod out load 1 f 2c r = the output capacitor and its esr also introduce a zero at: zmod out 1 f 2 esr c = when c out is composed of n identical capacitors in parallel, the resulting c out = n c out(each) , and esr = esr (each) /n. note that the capacitor zero for a parallel combination of alike capacitors is the same as for an individual capacitor. the feedback voltage-divider has a gain of gain fb = v fb /v out , where v fb is 1v (typ). the transconductance error amplifier has a dc gain of gain ea(dc) = g m_ea r out_ea , where g m_ea is the error amplifier transconductance, which is 700s (typ), and r out_ea is the output resistance of the error dpsolilhu0 figure 3. compensation network r c c c c f r 1 r 2 v out comp g m ref maxim integrated g 15 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
a dominant pole (f dpea ) is set by the compensation capac - itor (c c ) and the amplifier output resistance (r out_ea ). a zero (f zea ) is set by the compensation resistor (r c ) and the compensation capacitor (c c ). there is an optional pole (f pea ) set by c f and r c to cancel the output capaci - tor esr zero if it occurs near the crossover frequency (f c , where the loop gain equals 1 (0db)). thus: zea cc 1 f 2c r = pdea c out,ea c 1 f 2 c (r r ) = + pea fc 1 f 2c r = the loop-gain crossover frequency (f c ) should be set below 1/5 of the switching frequency and much higher than the power-modulator pole (f pmod ) sw pmod c f ff 5 << the total loop gain as the product of the modulator gain, the feedback voltage divider gain, and the error amplifier gain at f c should be equal to 1. so: fb mod(fc) ea(fc) out v gain gain 1 v = for the case where fzmod is greater than f c : ea(fc) m,ea c gain g r = therefore: fb mod(fc) m,ea c out v gain g r 1 v = solving for r c : out c m,ea fb mod(fc) v r g v gain = set the error-amplifier compensation zero formed by r c and c c (f zea ) at the f pmod . calculate the value of c c a follows: c pmod c 1 c 2f r = if f zmod is less than 5 x f c , add a second capacitor (c f ) from comp to gnd and set the compensation pole formed by r c and c f (f pea ) at the f zmod . calculate the value of c f as follows: f zmod c 1 c 2f r = as the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly and the crossover frequency remains the same. for the case where f zmod is less than f c : the power-modulator gain at f c is: pmod mod(fc) mod(dc) zmod f gain gain f = the error-amplifier gain at f c is: zmod ea(fc) m,ea c c f gain g r f = therefore: zmod fb mod(fc) m,ea c out c f v gain g r 1 vf = solving for rc: out c c m,ea fb mod(fc) zmod vf r g v gain f = set the error-amplifier compensation zero formed by r c and c c at the f pmod (f zea = f pmod ). c pmod c 1 c 2f r = if f zmod is less than 5 f c , add a second capacitor c f from comp to ground. set f pea = f zmod and calculate c f as follows: f zmod c 1 c 2f r = maxim integrated 16 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
pcb layout guidelines careful pcb layout is critical to achieve low switching losses and clean, stable operation. use a multilayer board whenever possible for better noise immunity and power dissipation. follow these guidelines for good pc board layout: 1) use a large contiguous copper plane under the device package. ensure that all heat-dissipating components have adequate cooling. the bottom pad of the devices must be soldered down to this copper plane for effective heat dissipation and getting the full power out of the devices. use multiple vias or a single large via in this plane for heat dissipation 2) isolate the power components and high current path from the sensitive analog circuitry. this is essential to prevent any noise coupling into the analog signals. 3) keep the high-current paths short, especially at the ground terminals. this practice is essential for stable, jitter-free operation. the high current path compris - ing of input capacitor, high-side fet, inductor, and the output capacitor should be as short as possible. 4) keep the power traces and load connections short. this practice is essential for high effciency. use thick copper pcbs (2oz vs. 1oz) to enhance full-load effciency. 5) the analog signal lines should be routed away from the high-frequency planes. this ensures integrity of sensitive signals feeding back into the ic. 6) the ground connection for the analog and power section should be close to the ic. this keeps the ground current loops to a minimum. in cases where only one ground is used, adequate isolation between analog return signals and high-power signals must be maintained. maxim integrated 17 www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
ordering information part v out adjustable (fb tied to resistor- divider) (v) v out fixed (fb tied to bias (v) maximum operating current (a) temp range pin- package minimum ilim (a) max20002 atpa/v+ 1 to 10 5 2 -40c to +125c 20 tqfn- ep* 2.5 max20002atpb/v+ 1 to 10 3.3 2 -40c to +125c 20 tqfn- ep* 2.5 max20002catpa/v+** 1 to 10 5 2 -40c to +125c 20 tqfn- ep* 2.5 MAX20002CATPB/v+** 1 to 10 3.3 2 -40c to +125c 20 tqfn- ep* 2.5 max20002catpc/v+** 1 to 10 5 2 -40c to +125c 20 tqfn- ep* 5 max20002catpd/v+** 1 to 10 3.3 2 -40c to +125c 20 tqfn- ep* 5 max20003 atpa/v+ 1 to 10 5 3 -40c to +125c 20 tqfn- ep* 3.75 max20003atpb/v+ 1 to 10 3.3 3 -40c to +125c 20 tqfn- ep* 3.75 max20003catpa/v+** 1 to 10 5 3 -40c to +125c 20 tqfn- ep* 3.75 max20003catpb/v+** 1 to 10 3.3 3 -40c to +125c 20 tqfn- ep* 3.75 max20003catpc/v+** 1 to 10 5 3 -40c to +125c 20 tqfn- ep* 5 max20003catpd/v+** 1 to 10 3.3 3 -40c to +125c 20 tqfn- ep* 5 /v denotes an automotive qualified part. + denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. * ep = exposed pad. **future productcontact factory for availability. package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 20 tqfn-ep t2055+4c 21-0140 90-00 09 maxim integrated 18 chip information process: bicmos www.maximintegrated.com max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current
revision history revision number revision date description pages changed 0 3/14 initial release 1 5/14 added overvoltage protection threshold spec to electrical characteristics table 5 2 2/15 updated the benefts and features section 1 3 11/15 added new package variants to electrical characteristics and ordering information tables 4, 5, 17 4 3/16 changed land pattern number in package information table from 90-0010 to 90-0009 17 5 4/16 updated ordering information 18 ? 2016 maxim integrated products, inc. 19 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifcations without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max20002/max20003 36v, 220khz to 2.2mhz, 2a/3a fully integrated step-down converters with 15a operating current for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com.

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